1. Field of the Invention
The present invention relates to a semiconductor device and a method of producing the same. More particularly, it relates to a power IC having a vertical power device for output and a method of producing the same.
2. Description of the Background Art
FIG. 15 is a cross-sectional view of a conventional power IC having a vertical power device 102 in accordance with junction isolation technique. The vertical power device is a device for electric power, in which current flows in the direction of the thickness of its substrate. N-type impurities are diffused on a surface of an N.sup.- single-crystal substrate 1b which is shown in FIG. 15 as the bottom surface thereof to form an N.sup.+ layer 11b. A surface of the N.sup.31 single-crystal substrate 1b which is shown in FIG. 15 as the top surface thereof is selectively etched away deeply. P-type impurities are diffused on the inside faces of hollows which are formed by etching to form junction isolation regions 7. After the junction isolation regions 7 are filled with thick N-type epitaxial layers 1a, the etched surfaces are ground.
A drive circuit 103 and a logic circuit 104 are formed in the N-type epitaxial layers 1a. The power device 102 such as VDMOS is formed in the substrate 1b. In FIG. 15, S designates a source, G designates a gate, D designates a drain and 6 designates an electrode.
FIG. 16 is a cross-sectional view of a conventional power IC having a vertical power device 105 in accordance with dielectric isolation technique. Deep V-shaped grooves 11a are cut from the bottom surface of a single-crystal substrate 1a. After N-type impurities are diffused over the bottom surface, an isolation oxide film 20 is formed. The isolation oxide film 20 is selectively removed as shown in FIG. 16, and an N.sup.+ epitaxial layer of high concentration is formed thick. Part of the N.sup.+ epitaxial layer which is grown on the isolation oxide film 20 serves as a polysilicon layer 12, and part of the N epitaxial layer which is grown on a portion from which the isolation oxide film 20 is removed serves as an N.sup.+ layer 1c.
Subsequently, the single-crystal substrate 1a is cut and ground from the top surface until the single-crystal substrate 1a is completely separated into islands by the isolation oxide film 20. Thus the vertical power device 105, a drive circuit 106 and a logic circuit 107 are formed respectively in the regions separated by the isolation oxide film 20 serving as a dielectric, as shown in FIG. 16.
Since the conventional power ICs shown in FIGS. 15 and 16 include the vertical power devices 102 and 105 therein respectively, an output current flows from the top surface to the bottom surface of the wafer in FIGS. 15 and 16. Thus the current path lies in the direction of the thickness of the substrate. This provides for a reduced thermal resistance and a large current flow. Particularly in FIG. 15, the substrate 1b is a single crystal so that a larger current flow is permitted. The substrate 1b and N.sup.+ layer 1c which are a body region can be formed thick. Particularly in FIG. 16, the thick formation and dielectric isolation enable an increased breakdown voltage.
In FIG. 15, however, since the devices are separated by junction isolation, there arises a problem that the drive circuit 103 and logic circuit 104 are low in isolation breakdown voltage and increase in capacitance has a limit when the portion of the junction isolation is made thick for increasing the breakdown voltage.
In FIG. 16, it is necessary to cut the V-shaped grooves 11a deeply for increasing the breakdown voltage. There is a problem that the drive circuit 106 and logic circuit 107 are inevitably to be formed unnecessarily thick because of the production procedure of the V-shaped grooves 11a. Another problem is deterioration in breakdown voltage due to inner defects of the N+ layer 1c serving as an epitaxial layer.